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Description: USB 1.1 IP-CORE和设计范例 VHDL源代码-Sample program for USB1.1 IP core design, VHDL source code
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Size: 426278 |
Author: ken |
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Description: 该范例使用FreeDev_usb11 ip core支持开发板成为USB HOST的 设备（常见的是PC机）。
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Size: 59392 |
Author: HuFengzhang |
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Description: 基于verilog HDL的一个USB 1.1的IP 核，内有详细文档说明。-Verilog HDL based on a USB 1.1 of the IP core, which has detailed documentation.
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Size: 414720 |
Author: 戴求淼 |
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Description: 飞利浦公司Usb芯片ISP1362在nios中的IP核，可以用-Philips Usb-chip ISP1362 in nios in the IP core, you can use
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Size: 18432 |
Author: KKK |
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Description: ISP1362的IP核用在USB 控制上可与PC通讯，作为SOPC的IP核-ISP1362' s USB IP core used in the control of communication with PC as the IP core SOPC
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Size: 18432 |
Author: 赵擎天 |
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Description: 用verilog 写的 USB 驱动 适用于SOPC IP CORE-USB drive write verilog. For in the SOPC IP CORE
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Size: 19456 |
Author: wang |
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Description: register bits of the ChipIdea USB IP core for Embedded Linux.
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Size: 8192 |
Author: bivaiha |
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Description: ChipIdea USB IP core OTG driver for Embedded Linux.
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Size: 2048 |
Author: seizingxun |
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Description: MIPS USB IP core family device controller.
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Size: 2048 |
Author: gounsws |
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Description: otg.c - ChipIdea USB IP core OTG driver.
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Size: 2048 |
Author: cmzpss |
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Description: otg_fsm.c - ChipIdea USB IP core OTG FSM driver.
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Size: 6144 |
Author: sbfiyg |
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Description: nios ii中对USB的实用，包括IP核和C代码，方便实用-nios ii the use of USB, including IP core and C code, convenient and practical
Platform: |
Size: 87040 |
Author: 王亚斌 |
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Description: usb 设备 IP核 verilog实现-usb device core, verilog
Platform: |
Size: 37888 |
Author: 李红敏 |
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